General Purpose Input/Output
TSync Time Code Processor cards have four general purpose input (GPIO) pins and four general purpose output (GPIO) pins. The General I/O subsystem provides a mechanism to generate or time stamp external events, to match times and generate a signal, to create Heartbeat pulses, or to create square wave clock signals synchronous to the internal timing system clock and to the 1PPS signal from the input reference.
Programmable Inputs
The General I/O input pins support user selection for detection of rising edge or falling edge input events. These inputs, when triggered, are used to time-tag the input edge-detected events. They support a time between input events of 50 nsec and an overall rate of more than 10,000 time stamps per second. Time stamps are maintained in a FIFO manner on the board that can store up to 512 unique time stamps among all input pins.
Programmable Outputs
The user may select the operational mode of the General I/O outputs pins, setting them to generic output pins, square wave generation, and match time events.
The General I/O outputs, when configured as generic output pins, can be controlled and changed at the user’s discretion.
The General I/O output can be programmed as a square wave synchronized to the 1PPS. When used to output a square wave, the General I/O has a programmable period range of 100 nsec to 1sec (10 MHz to 1Hz) in 5nsec steps and a programmable pulse width of 10 nsec to 999,999,990 nsec in 5nsec steps (polarity is programmable).
The General I/O is configurable as a Match Time Event pin, which will activate at a preset time and become inactive at another preset time. The Match Time Event provides two user settable times to make the General I/O pin active and inactive. The Match Time Event configured General I/O pin has a programmable edge, allowing the selection of Low to High or High to Low.s
The General I/O output signals timing are accurate relative to the Input reference’s 1PPS signal to within ±50 nsec. The General I/O output has a programmable offset, which ranges from
–500 msec to +500 msec in 5nsec steps.